struct spi_master — interface to SPI master controller
struct spi_master {
struct device dev;
struct list_head list;
s16 bus_num;
u16 num_chipselect;
u16 dma_alignment;
u16 mode_bits;
u16 flags;
#define SPI_MASTER_HALF_DUPLEX BIT(0)
#define SPI_MASTER_NO_RX BIT(1)
#define SPI_MASTER_NO_TX BIT(2)
spinlock_t bus_lock_spinlock;
struct mutex bus_lock_mutex;
bool bus_lock_flag;
int (* setup) (struct spi_device *spi);
int (* transfer) (struct spi_device *spi,struct spi_message *mesg);
void (* cleanup) (struct spi_device *spi);
}; device interface to this driver
link with the global spi_master list
board-specific (and often SOC-specific) identifier for a given SPI controller.
chipselects are used to distinguish individual SPI slaves, and are numbered from zero to num_chipselects. each slave has a chipselect signal, but it's common that not every chipselect is connected to a slave.
SPI controller constraint on DMA buffers alignment.
flags understood by this controller driver
other constraints relevant to this driver
spinlock for SPI bus locking
mutex for SPI bus locking
indicates that the SPI bus is locked for exclusive use
updates the device mode and clocking records used by a device's SPI controller; protocol code may call this. This must fail if an unrecognized or unsupported mode is requested. It's always safe to call this unless transfers are pending on the device whose settings are being modified.
adds a message to the controller's transfer queue.
frees controller-specific state
Each SPI master controller can communicate with one or more spi_device
children. These make a small bus, sharing MOSI, MISO and SCK signals
but not chip select signals. Each device may be configured to use a
different clock rate, since those shared signals are ignored unless
the chip is selected.
The driver for an SPI controller manages access to those devices through a queue of spi_message transactions, copying data between CPU memory and an SPI slave device. For each such message it queues, it calls the message's completion function when the transaction completes.